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Emulation Engineer, Hardware Prototyping (HAPS)

Location: San Jose, CA, USA
Compensation:

USD 150k-275k / year

Posted:
4 months
Series C
Mid-Senior Level
Analytics
Application Specific Integrated Circuit (ASIC)
Artificial Intelligence (AI)
Cloud Security
Compliance
Consumer Electronics
Data & Analytics
Data Governance
Hardware
Manufacturing
Semiconductor
Software

Post-Silicon Validation Engineer

Location: San Jose, CA, USA
Compensation:

USD 200k-275k / year

Posted:
6+ months
Series C
Senior
Analytics
Application Specific Integrated Circuit (ASIC)
Artificial Intelligence (AI)
Cloud Security
Compliance
Consumer Electronics
Data & Analytics
Data Governance
Hardware
Manufacturing
Semiconductor
Software

PCB Layout Engineer

Location: San Jose, CA, USA
Compensation:

USD 150k-275k / year

Posted:
6+ months
Series C
Senior
Analytics
Application Specific Integrated Circuit (ASIC)
Artificial Intelligence (AI)
Cloud Security
Compliance
Consumer Electronics
Data & Analytics
Data Governance
Hardware
Manufacturing
Semiconductor
Software